The present invention concerns a semiconductor device having a vertical transistor, a method of manufacturing the semiconductor device, and an electronic device.
Semiconductor devices include those having a vertical transistor. The vertical transistor is used, for example, in a device of controlling a high current. Japanese Patent Laid-Open Publication No. 2005-86140 describes that the gate electrode of a vertical MOS transistor is covered with a stacked film of an NSG film and a BPSG film, or a stacked film of a PSG film and a BPSG film. Japanese Patent Laid-Open Publication No. 2002-280553 describes that the gate electrode of a vertical MOS transistor is covered with an insulating film such as a BPSG film.
Japanese Patent Laid-Open Publication No. 2000-183182 describes that a CMOS device is covered with a stacked film of an oxide film, a silicon nitride film, and a BPSG film while this is a technique concerning a planar transistor. In this technique, the silicon nitride film is used for preventing moisture diffusion.